Ask About Computers Blog

Kentsfield is the codename for the quad-core CPU that Intel has in store for us by the end of this year. Its design is relatively simple and consists of putting together two Core 2 Duo processors in a single CPU.

Originally only the 975X chipset was to support Kentsfield. However, support has been expanded to include the P965 chipset as well. Making the P965 chipset support Kentsfield is “not that easy“.

Changes had to be made to the specification for the P965. This is no good if you have already designed your motherboards. Manufacturers accordingly “are unhappy“.

Bottom line? Not all P965 motherboards will support the new Kentsfield CPU.

Putting together two dual-core CPUs is arguably not the best way to build a quad-core CPU. This is the sort of thing that got Intel in trouble with the Pentium D, which was two Pentium 4s put together.

However, this is probably the fastest path to quad-core. It’s important that quad-core get in the hands of software developers as soon as possible, so they can start optimizing code for quad-core. Hardware precedes software.

By doubling the cores, you potentially double performance. However, the software has to be well-threaded to take better advantage of four cores.

Don’t be too surprised if Intel comes out with a second generation quad-core part. After all, they came out with three generations of dual-core CPUs (Pentium D, Core Duo, and Core 2 Duo).

Expect Intel to put two quad-core CPUs together to produce the industry’s first eight-core CPU design, if they hold true to the pattern they’re establishing.

Doubling the number of cores on a processor in theory doubles performance.

While certain applications on quad-core CPUs do see a doubling of performance compared to dual-core, most applications experience only a small boost, even when the applications are multithreaded.

One of the problems is the software.

To this end, efforts are under way to prepare tommorrow’s programmers to code for multi-core. “The full potential of multi-core based systems to deliver great performance and expanded usages is unleashed when software is designed to take advantage of the full capabilities“.

These efforts are not limited to the U.S.

They go beyond multi-core to include multiprocessor and other forms of multithreaded systems.

September 14, 2K6

First there was Woodcrest and the Xeon 5100 family of processors. Then it was Montecito and the Itanium 2 9000 series. Most recently Intel announced the Xeon 7100 family of chips, codenamed Tulsa, for the high-end x86 multiprocessor (MP) server market.

This is why Intel calls this their summer of servers.

According to Intel, the Xeon 7100 chips offer as much as twice the performance of the previous multiprocessor server chips. That’s nice. But what about the frontside bus (FSB)?

The FSB is a bottleneck, and the more processors you put on a board, the greater the bottleneck.

It’s a process akin to sucking water through a straw when you’re thirsty.

This isn’t a weakness of the processor as much as it is a design of the system.

Intel hopes to counter the FSB with lots and lots of cache.

The L3 cache of the Xeon 7100 series is shared, much like the shared cache of the Core microarchitecture products (Core 2 Duo and Xeon 5100). However, it’s an L3 cache, rather than L2.

The Xeon 7100 family of processors can scale to 32 dual-core processors. Beyond that, you will have to adopt Itanium 2 or scale out with additional x86 servers.

The new processor comes with a TDP rating of 95W, which isn’t bad for NetBurst.

This will probably be the last series of chips based on the NetBurst microarchitecture.

The Xeon 7100 series appears to be the first x86 chip from Intel with over a billion transistors. Most of these transistors are located in the large cache. However, only the highest clocked Xeon 7100 processors have the full 16MB of L3 cache. Others have half that or less.

One thing about the new processors, though, is that they fit within existing Xeon 7000 systems. In other words, they are “socket compatible with the currently shipping platform“.