Xeon 7100 Series (Tulsa)

7/18 - August is shaping up to be a busy month for Intel. Merom, or mobile Core 2 Duo, is supposed to ship in August. A new Xeon MP (multi-processor) CPU is to be released in August, as well.

Paxville MP is to give way to Tulsa. Put another way, the Xeon 7000 series will give way to the Xeon 7100 family of chips.

Xeon 7100 is an x86 design. It's not IA-64 (Itanium).

The chip has over a billion transistors. It has up to 16MB of L3 cache. It's L3 cache is shared amongst dual cores. The shared cache is similar in design "to Core architecture".

In other respects, the chip resembles the Netburst microarchitecture, rather than the Core microarchitecture. It has a large number of pipeline stages, similar to Netburst. It hyper-threads, similar to Netburst. It's similar to Netburst, because it is Netburst.

The chip has the largest cache and transistor "count for an x86 processor".

I'm not sure this is all of a good thing. It draws up to 150W. The size of the die is huge--almost 10 times the size of Core Duo (Yonah).

Core microarchitecture MP server chips are not set to debut until the third quarter of next year--about a year from now--with Dunnington, which is dual-core, and Tigerton (quad-core), according "to the latest roadmap".

The Core microarchitecture MP chips Dunnington and Tigerton shall debut on a different platform, Caneland, so they shall probably not be drop-in compatible with the current Truland platform Xeon MP server chips.

Source: HKEPC

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