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6/21 - It's been three generations of chipsets (the 915/925, 945/955, & 975) that Intel has lost its performance lead in desktop CPUs. It's ok to have a losing season once in a while, but don't put them back to back.
Times have changed, however, and Intel has a new winner on its hand. Maybe it's a combination of the long drought in performance leadership and quality of the new chip, but the result is "one of the most hyped and anticipated processor launches".
The Core microarchitecture is not just a desktop processor, however. Intel in on the verge of releasing an entire new microarchitecture. The server version shall debut first, on June 26. The desktop variant--named Core 2--is rumored to launch on July 23, and mobile Core 2 Duo is scheduled for August.
Intel has quad-core versions of the desktop and server chips for the first quarter of 2007. Codenames Kentsfield and Clovertown, respectively. The desktop quad-core is supposed to combine two Core 2 processors in a single package. Perhaps the server version will do the same.
Later in 2007, Penryn is to be a die shrink of the Core microarchitecture: a die shrink, but also a change in material design, and a move from silicon dioxide gate dielectrics to high-k dielectrics. Intel "will also revamp its gate electrodes to metal instead of Polysilicon derivatives".
The microarchitecture to follow the Core microarchitecture is based on the Nehalem core. This is for 2008.
A processor within this next generation microarchitecture is codenamed Nehalem-C and is a die shrink, but shall also use a different lithography process, transitioning from deep ultraviolet (DUV) to extreme ultraviolet (EUV). "EUV must be done in a vacuum with reflective surfaces instead of lenses to focus and redirect the lithography".
The next microarchitecture after that is known as Gesher. At some point in this general timeframe, Intel should start using tri-gate transistors. In a tri-gate design, "a single gate is stacked on top of two vertical gates allowing for essentially three times the surface area for electrons to travel".