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Sossaman: Dual-Core Xeon LV

3/27 - At the last Intel Developer Forum (IDF), Intel announced that it "will ship three new [server] processors in 2006".

One of these server chips has in fact already shipped. The Dual-Core Intel Xeon processor LV is the first dual-core low voltage server chip from Intel. The codename of the Dual-Core Xeon LV was Sossaman. Sossaman is based upon Intel's current mobile processor architecture, Core Duo, which in turn went by the codename Yonah. Core Duo and Core Solo (Core Duo with only one core)—and Sossaman's architecture, for that matter—are not to be confused with the new Core microarchitecture, which is Intel's next generation architecture and has not been released yet.

Historically, the computing industry has focused on raw performance. This was by and large true, until Intel could not drive clock speeds any higher, when they hit a thermal ceiling, where the chips just ran too hot to cool in a reasonable way. To this day, Intel has yet to produce a normally clocked 4 GHz part.

In concentrating primarily on raw performance, perhaps the industry was wrong. Maybe the industry should have been focused on efficient computing all along. Be that as it may, at the IDF before last, Intel introduced a new metric for evaluating processors—performance per watt (ppw). Intel's archrival and nemesis AMD was quick to pounce and point out that AMD's current offerings were more efficient from a ppw perspective.

This performance per watt advantage is supposed to swing to Intel's favor with the advent of Intel's next generation Core microarchitecture. The problem is that the Core microarchitecture is not here yet. In the meantime, Sossaman—the new Dual-Core Xeon LV—also turns in strong ppw figures, even though it is not based on the upcoming Core microarchitecture.

Intel has published statistics showing the Dual-Core Xeon LV outperforming its predecessor by a factor of two. Per watt, it can outperform by a factor of 4. So the new processor offers up to 2x the performance, and up to 4x the performance per watt.

One must always take statistics with a grain of salt, especially when the statistics come from the manufacturer itself. Even so, independent testing has indicated that the new chip provides "exceptional performance per watt".

One computer maker to adopt the new chip is IBM. The Dual-Core Xeon LV is to appear in IBM's ultra low power BladeCenter HS20, which according to IBM offers "the industry's best performance per watt".

Probably the most obvious feature of the new Xeon LV is that it provides up to four cores of processing power at the same time. It is a dual processor chip, meaning that a system can fit up to two processors on a board. Each processor has two cores, so 2 processors x 2 cores = 4 cores.

Another important feature is its shared, "smart" cache. If one of the cores has already pulled down iformation into its cache, the other core can access this information and does not have to go outside of the cache, and over the front side bus (FSB), to retrieve the data. This reduces FSB traffic and is one reason why the chip performs well.

The chip also incorporates aggressive power management technology. It's based on a mobile chip, remember.

One thing the new processor is not is 64-bit. It does not offer 64-bit extensions in hardware for x64 64-bit computing, or Windows Server 2003 x64, with Intel's so called EM64T (Enhanced Memory 64-bit Technology). For 64-bit computing in a low voltage Xeon, one must await Woodcrest, currently scheduled for the third quarter.

Even though the new Xeon LV does not support 64-bit computing, it is nevertheless able to address more memory than typical 32-bit systems, if it is paired with the right chipset. Intel has made the claim that it is no longer a processor company but rather a platform company. When paired with the E7250 Lindenhurst chipset, the Xeon LV becomes a platform that is optimized for blade servers and other high-density computing systems.

The paired CPU and chipset are to appear in Intel's own line of NetStructure Single Board Computers and Server Compute Blades. A Server Compute Blade is just an Intel blade server with a Xeon server processor inside.

It would appear that Hewlett-Packard is behind the new Xeon LV, in its latest incarnation at any rate. HP asserts that its own Advanced Open Telecom Platform (AOTP) and Intel hardware that adheres to the Advanced Telecom Computing Architecture (AdvancedTCA) standard—such as Intel's single board computers—enable HP's telecommunications "customers to evolve their networks in the most strategic, cost–effective way".

Both HP's telecommunications platform and the AdvancedTCA spec are attempts to move the telecommunications industry to open standards and industry standard, off-the-shelf hardware. The telecom indusry has unique equipment requirements, and the solutions provided in the past have largely been proprietary. On the other hand, industry standard hardware has certain advantages that many telecom businesses would like to take advantage of. The purpose of AdvancedTCA—which HP's platform supports—is to provide an open standard which hardware manufacturers can follow to meet, among other things, the the rigorous needs for flexibility and scalability in telecommunications.